The present invention relates to AXI4 augmented addressing and, more specifically, to improved logic utilization with AXI4 augmented addressing.
Advanced microcontroller bus architecture (AMBA) is an open-standard, on-chip interconnect specification for the connection and management of functional blocks in system-on-a-chip (SoC) designs. AMBA facilitates development of multi-processor designs with large numbers of controllers and peripherals. Since its inception, the scope of AMBA has, despite its name, gone far beyond micro-controller devices and is now used on a range of application specific integrated circuit (ASIC) and SoC parts including applications processors used in modern portable mobile devices like smartphones.
In greater detail, the first AMBA buses were advanced system buses (ASB) and advanced peripheral buses (APB). In later versions, high-performance buses (AHB), advanced extensible interfaces (AXI) and advanced trace buses (ATB) were added. Most recently, AXI4 has been developed to extend system-wide coherency.
The AXI4 protocol is a commercial standard that allows for the interconnection of design entities and endpoints by way of an interconnect entity. Within the AXI4 protocol, it has been seen that instantiation of multiple endpoints of a same type requires multiple connections to the interconnect entity. These multiple connections, for repeated instantiations of the same entity, results in increased field programmable gate array (FPGA) fabric use, increased data propagation delay and reduced design efficiency.